Mixed-Signal Layout Generation Concepts /
Lin, Chieh.
Mixed-Signal Layout Generation Concepts / by Chieh Lin, Arthur H. M. Roermund, Domine M. W. Leenaerts. - 210 páginas, recurso en línea. - The International Series in Engineering and Computer Science, Analog Circuits and Signal Processing, 751 0893-3405 ; .
Springer eBooks
Mapping Problems in the Design Flow -- Optimization Methods -- Optimization Approach Based on Simulated Annealing -- Efficient Algorithms and Data Structures -- Placement -- Routing -- Dealing with Physical Phenomena: Parasitics, Crosstalk and Process Variations -- Conclusions.
Mixed-Signal Layout Generation Concepts covers important physical-design issues that exist in contemporary analog and mixed-signal design flows. Due to the increasing pressure on time-to-market, the steep increase in chip fabrication costs, and the increasing design complexity, it becomes even more challenging to produce a first-time right IC layout. The fundamental issues in creating a layout are placement and routing. Although these coupled problems have been investigated for many decades, no satisfactory automated solution has emerged yet. Fortunately, supported by modern computing power and results of new research that further improve computation efficiency, significant steps forward have been taken.
9780306487255
10.1007/b106472 doi
TK7888.4
Mixed-Signal Layout Generation Concepts / by Chieh Lin, Arthur H. M. Roermund, Domine M. W. Leenaerts. - 210 páginas, recurso en línea. - The International Series in Engineering and Computer Science, Analog Circuits and Signal Processing, 751 0893-3405 ; .
Springer eBooks
Mapping Problems in the Design Flow -- Optimization Methods -- Optimization Approach Based on Simulated Annealing -- Efficient Algorithms and Data Structures -- Placement -- Routing -- Dealing with Physical Phenomena: Parasitics, Crosstalk and Process Variations -- Conclusions.
Mixed-Signal Layout Generation Concepts covers important physical-design issues that exist in contemporary analog and mixed-signal design flows. Due to the increasing pressure on time-to-market, the steep increase in chip fabrication costs, and the increasing design complexity, it becomes even more challenging to produce a first-time right IC layout. The fundamental issues in creating a layout are placement and routing. Although these coupled problems have been investigated for many decades, no satisfactory automated solution has emerged yet. Fortunately, supported by modern computing power and results of new research that further improve computation efficiency, significant steps forward have been taken.
9780306487255
10.1007/b106472 doi
TK7888.4