Cryptographic hardware and embedded systems – ches 2014 :
Cryptographic hardware and embedded systems – ches 2014 : 16th international workshop, busan, south korea, september 23-26, 2014. Proceedings /
edited by Lejla Batina, Matthew Robshaw.
- xiv, 618 páginas : 192 ilustraciones
- Lecture Notes in Computer Science, 8731 0302-9743 ; .
Springer eBooks
Side-Channel Attacks -- EM Attack Is Non-invasive? - Design Methodology and Validity Verification of EM Attack Sensor -- A New Framework for Constraint-Based Probabilistic Template Side Channel Attacks -- How to Estimate the Success Rate of Higher-Order Side-Channel Attacks -- Good Is Not Good Enough: Deriving Optimal Distinguishers from Communication Theory -- New Attacks and Constructions -- “Ooh Aah... Just a Little Bit” : A Small Amount of Side Channel Can Go a Long Way -- Destroying Fault Invariant with Randomization: A Countermeasure for AES against Differential Fault Attacks -- Reversing Stealthy Dopant-Level Circuits -- Constructing S-boxes for Lightweight Cryptography with Feistel Structure -- Countermeasures -- A Statistical Model for Higher Order DPA on Masked Devices -- Fast Evaluation of Polynomials over Binary Finite Fields and Application to Side-Channel Countermeasures -- Secure Conversion between Boolean and Arithmetic Masking of Any Order -- Making RSA–PSS Provably Secure against Non-random Faults -- Algorithm Specific SCA -- Side-Channel Attack against RSA Key Generation Algorithms -- Get Your Hands Off My Laptop: Physical Side-Channel Key-Extraction Attacks on PCs -- RSA Meets DPA: Recovering RSA Secret Keys from Noisy Analog Data -- Simple Power Analysis on AES Key Expansion Revisited -- ECC Implementations -- Efficient Pairings and ECC for Embedded Systems -- Curve41417: Karatsuba Revisited -- Implementations -- Cofactorization on Graphics Processing Units -- Enhanced Lattice-Based Signatures on Reconfigurable Hardware -- Compact Ring-LWE Cryptoprocessor -- Hardware Implementations of Symmetric Cryptosystems -- ICEPOLE: High-Speed, Hardware-Oriented Authenticated Encryption -- FPGA Implementations of SPRING: And Their Countermeasures against Side-Channel Attacks -- FOAM: Searching for Hardware-Optimal SPN Structures and Components with a Fair Comparison -- PUFs Secure Lightweight Entity Authentication with Strong PUFs: Mission Impossible? -- Efficient Power and Timing Side Channels for Physical Unclonable Functions -- Physical Characterization of Arbiter PUFs -- Bitline PUF: Building Native Challenge-Response PUF Capability into Any SRAM -- RNGs and SCA Issues in Hardware -- Embedded Evaluation of Randomness in Oscillator Based Elementary TRNG -- Entropy Evaluation for Oscillator-Based True Random Number Generators -- Side-Channel Leakage through Static Power: Should We Care about in Practice -- Gate-Level Masking under a Path-Based Leakage Metric -- Early Propagation and Imbalanced Routing, How to Diminish in FPGAs.
9783662447093
QA76.9.A25
Springer eBooks
Side-Channel Attacks -- EM Attack Is Non-invasive? - Design Methodology and Validity Verification of EM Attack Sensor -- A New Framework for Constraint-Based Probabilistic Template Side Channel Attacks -- How to Estimate the Success Rate of Higher-Order Side-Channel Attacks -- Good Is Not Good Enough: Deriving Optimal Distinguishers from Communication Theory -- New Attacks and Constructions -- “Ooh Aah... Just a Little Bit” : A Small Amount of Side Channel Can Go a Long Way -- Destroying Fault Invariant with Randomization: A Countermeasure for AES against Differential Fault Attacks -- Reversing Stealthy Dopant-Level Circuits -- Constructing S-boxes for Lightweight Cryptography with Feistel Structure -- Countermeasures -- A Statistical Model for Higher Order DPA on Masked Devices -- Fast Evaluation of Polynomials over Binary Finite Fields and Application to Side-Channel Countermeasures -- Secure Conversion between Boolean and Arithmetic Masking of Any Order -- Making RSA–PSS Provably Secure against Non-random Faults -- Algorithm Specific SCA -- Side-Channel Attack against RSA Key Generation Algorithms -- Get Your Hands Off My Laptop: Physical Side-Channel Key-Extraction Attacks on PCs -- RSA Meets DPA: Recovering RSA Secret Keys from Noisy Analog Data -- Simple Power Analysis on AES Key Expansion Revisited -- ECC Implementations -- Efficient Pairings and ECC for Embedded Systems -- Curve41417: Karatsuba Revisited -- Implementations -- Cofactorization on Graphics Processing Units -- Enhanced Lattice-Based Signatures on Reconfigurable Hardware -- Compact Ring-LWE Cryptoprocessor -- Hardware Implementations of Symmetric Cryptosystems -- ICEPOLE: High-Speed, Hardware-Oriented Authenticated Encryption -- FPGA Implementations of SPRING: And Their Countermeasures against Side-Channel Attacks -- FOAM: Searching for Hardware-Optimal SPN Structures and Components with a Fair Comparison -- PUFs Secure Lightweight Entity Authentication with Strong PUFs: Mission Impossible? -- Efficient Power and Timing Side Channels for Physical Unclonable Functions -- Physical Characterization of Arbiter PUFs -- Bitline PUF: Building Native Challenge-Response PUF Capability into Any SRAM -- RNGs and SCA Issues in Hardware -- Embedded Evaluation of Randomness in Oscillator Based Elementary TRNG -- Entropy Evaluation for Oscillator-Based True Random Number Generators -- Side-Channel Leakage through Static Power: Should We Care about in Practice -- Gate-Level Masking under a Path-Based Leakage Metric -- Early Propagation and Imbalanced Routing, How to Diminish in FPGAs.
9783662447093
QA76.9.A25