Nanoscaled Semiconductor-on-Insulator Structures and Devices / edited by Steve Hall, Alexei N. Nazarov, Vladimir S. Lysenko.

Springer eBooks

Nanoscaled SOI Material and Device Technologies -- Status and trends in SOI nanodevices -- Non-Planar Devices for Nanoscale CMOS -- High-? Dielectric Stacks for Nanoscaled SOI Devices -- Nanoscaled Semiconductor Heterostructures for CMOS Transistors Formed by Ion Implantation and Hydrogen Transfer -- Fluorine –Vacancy Engineering: A Viable Solution for Dopant Diffusion Suppression in SOI Substrates -- Suspended Silicon-On-Insulator Nanowires for the Fabrication of Quadruple Gate MOSFETs -- Physics of Novel Nanoscaled SemOI Devices -- Integration of silicon Single-Electron Transistors Operating at Room Temperature -- SiGe Nanodots in Electro-Optical SOI Devices -- Nanowire Quantum Effects in Trigate SOI MOSFETs -- Semiconductor Nanostructures and Devices -- MuGFET CMOS Process with Midgap Gate Material -- Doping Fluctuation Effects in Multiple-Gate SOI MOSFETs -- SiGeC HBTs: impact of C on Device Performance -- Reliability and Characterization of Nanoscaled SOI Devices -- Noise Research of Nanoscaled SOI Devices -- Electrical Characterization and Special Properties of FINFET Structures -- Substrate Effect on the Output Conductance Frequency Response of SOI MOSFETs -- Investigation of Compressive Strain Effects Induced by STI and ESL -- Charge Trapping Phenomena in Single Electron NVM SOI Devices Fabricated by a Self-Aligned Quantum DOT Technology -- Theory and Modeling of Nanoscaled Devices -- Variability in Nanoscale UTB SOI Devices and its Impact on Circuits and Systems -- Electron Transport in Silicon-on-Insulator Nanodevices -- All Quantum Simulation of Ultrathin SOI MOSFETs -- Resonant Tunneling Devices on SOI Basis -- Mobility Modeling in SOI FETs for Different Substrate Orientations and Strain Conditions -- Three-Dimensional (3-D) Analytical Modeling of the Threshold Voltage, DIBL and Subthreshold Swing of Cylindrical Gate all Around Mosfets.

The book details many of the key issues associated with the scaling to nano-dimensions of silicon-on-insulator structures. Some papers offer new insight particularly at the device/circuit interface as appropriate for SOI which is fast becoming a mainstream technology. One of the key issues concerns mobility degradation in SOI films less than about 5nm. The advantages of combining scaled SOI devices with high permittivity (k) dielectric indicates that potential solutions are indeed available down to the 22nm node even with 5nm SOI films. A further key issue and potential ‘show stopper’ for SOI CMOS is highlighted in a number of invited and contributed papers addressing atomistic level effects. Results are presented for Monte Carlo and drift/diffusion modelling together with device compact models and circuit level simulation and this provided for a broad exposure of the problems from intrinsic physics to the circuit level. The scaling to nano-dimensions takes the technology into the realms of quantum effects and a number of papers addressed this aspect from both the technological and physics aspects. The scope of potential applications for quantum dots, quantum wires and nanotubes are considered. The use of semiconductor materials other than Si, on insulator, is featured in some sections of the book. The potential of III/V, Ge and other materials to facilitate continuation down the roadmap is illustrated by a review of the state-of-the-art.

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