Wafer-level chip-scale packaging : analog and power semiconductor applications / Shichun Qu, Yong Liu.
Tipo de material:
TextoEditor: New York, NY : Springer New York : Springer, 2015Descripción: xvii, 322 páginas : 314 ilustraciones, 256 ilustraciones en colorTipo de contenido: - texto
- computadora
- recurso en línea
- 9781493915569
- TK7800-8360
Springer eBooks
Chapter 1. Demand and Challenges for Wafer Level Analog and Power Packaging -- Chapter 2. Fan-In Analog Wafer Level Chip Scale Package -- Chapter 3. Fan-Out Analog Wafer Level Chip Scale Package -- Chapter 4. Wafer Level Analog Chip Scale Package Stackable Design -- Chapter 5. Wafer Level Discrete Power MOSFET Package Design -- Chapter 6. Wafer Level Packaging TSV/Stack die for Integration of Analog and Power Solution -- Chapter 7. Thermal Management, Design, Analysis for WLCSP -- Chapter 8. Electrical and Multi-Physics Simulations for Analog and Power WLCSP -- Chapter 9. WLCSP Typical Assembly Process -- Chapter 10. WLCSP Typical Reliability and Test.
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