Flip-flop design in nanometer cmos : from high speed to low energy /
Massimo Alioto, Elio Consoli, Gaetano Palumbo.
- xv, 260 páginas : 123 ilustraciones, 5 ilustraciones en color.
Springer eBooks
The Logical Effort Method -- Design in the Energy-Delay Space -- Clocked Storage Elements -- Flip-Flop Optimized Design -- Analysis and Comparison in the Energy-Delay-Area Domain -- Energy Efficiency Versus Clock Slope -- Hold Time Issues and Impact of variations on Flip-Flop Topologies -- Ultra-Fast and Energy-Efficient Pulsed Latch Topologies.