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007 | cr nn 008mamaa | ||
008 | 150903s2005 xxu| o |||| 0|eng d | ||
020 |
_a9780387256245 _9978-0-387-25624-5 |
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024 | 7 |
_a10.1007/b135763 _2doi |
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039 | 9 |
_a201509030443 _bVLOAD _c201405070502 _dVLOAD _c201401311332 _dstaff _c201401311156 _dstaff _y201401291449 _zstaff _wmsplit0.mrc _x597 |
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050 | 4 | _aTK1-9971 | |
100 | 1 |
_aLarsson, Erik. _eautor _9301836 |
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245 | 1 | 0 |
_aIntroduction to Advanced System-on-Chip Test Design and Optimization / _cby Erik Larsson. |
264 | 1 |
_aBoston, MA : _bSpringer US, _c2005. |
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300 |
_aXVI, 388 páginas, _brecurso en línea. |
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336 |
_atexto _btxt _2rdacontent |
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337 |
_acomputadora _bc _2rdamedia |
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338 |
_arecurso en línea _bcr _2rdacarrier |
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347 |
_aarchivo de texto _bPDF _2rda |
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490 | 0 |
_aFrontiers in Electronic Testing, _x0929-1296 ; _v29 |
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500 | _aSpringer eBooks | ||
505 | 0 | _aTesting Concepts -- Design Flow -- Design for Test -- Boundary Scan -- SOC Design for Testability -- System Modeling -- Test Conflicts -- Test Power Dissipation -- Test Access Mechanism -- Test Scheduling -- SOC Test Applications -- A Reconfigurable Power-Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling -- An Integrated Framework for the Design and Optimization of SOC Test Solutions -- Efficient Test Solutions for Core-Based Designs -- Core Selection in the SOC Test Design-Flow -- Defect-Aware Test Scheduling -- An Integrated Technique for Test Vector Selection and Test Scheduling under ATE Memory Depth Constraint. | |
520 | _aSOC test design and its optimization is the topic of Introduction to Advanced System-on-Chip Test Design and Optimization. It gives an introduction to testing, describes the problems related to SOC testing, discusses the modeling granularity and the implementation into EDA (electronic design automation) tools. The book is divided into three sections: i) test concepts, ii) SOC design for test, and iii) SOC test applications. The first part covers an introduction into test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. The second part of the book discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. Finally, the third part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with the core selection process. | ||
590 | _aPara consulta fuera de la UANL se requiere clave de acceso remoto. | ||
710 | 2 |
_aSpringerLink (Servicio en línea) _9299170 |
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776 | 0 | 8 |
_iEdición impresa: _z9781402032073 |
856 | 4 | 0 |
_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/b135763 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL) |
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