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008 | 150903s2006 xxu| o |||| 0|eng d | ||
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_a9780387289656 _99780387289656 |
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024 | 7 |
_a10.1007/0387289658 _2doi |
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_a201509030724 _bVLOAD _c201404120517 _dVLOAD _c201404090258 _dVLOAD _c201401311348 _dstaff _y201401301151 _zstaff |
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_aMX-SnUAN _bspa _cMX-SnUAN _erda |
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050 | 4 | _aTK7888.4 | |
100 | 1 |
_aHamblen, James O. _eautor _9302061 |
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245 | 1 | 0 |
_aRapid Prototyping of Digital Systems / _cby James O. Hamblen, Tyson S. Hall, Michael D. Furman. |
250 | _aQUARTUS® II EDITION. | ||
264 | 1 |
_aBoston, MA : _bSpringer US, _c2006. |
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300 |
_axvI, 371 páginas, With CD-ROM. _brecurso en línea. |
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336 |
_atexto _btxt _2rdacontent |
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_acomputadora _bc _2rdamedia |
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_arecurso en línea _bcr _2rdacarrier |
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_aarchivo de texto _bPDF _2rda |
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500 | _aSpringer eBooks | ||
505 | 0 | _aTutorial I: The 15-Minute Design -- The Altera UP 3 Board -- Programmable Logic Technology -- Tutorial II: Sequential Design and Hierarchy -- UP3core Library Functions -- Using VHDL for Synthesis of Digital Hardware -- Using Verilog for Synthesis of Digital Hardware -- State Machine Design: The Electric Train Controller -- A Simple Computer Design: The µP 3 -- VGA Video Display Generation -- Interfacing to the PS/2 Keyboard and Mouse -- Legacy Digital I/O Interfacing Standards -- UP 3 Robotics Projects -- A RISC Design: Synthesis of the MIPS Processor Core -- Introducing System-on-a-Programmable-Chip -- Tutorial III: Nios II Processor Software Development -- Tutorial IV: Nios II Processor Hardware Design. | |
520 | _aRapid Prototyping of Digital Systems: Quartus II Edition provides an exciting and challenging laboratory component for undergraduate digital logic and computer design courses using FPGAs and CAD tools for simulation and hardware implementation. The more advanced topics and exercises also make this text useful for upper level courses in digital logic, programmable logic, and embedded systems. This new version of the widely used Rapid Prototyping of Digital Systems, Second Edition, now uses Altera's new Quartus II CAD tool and includes laboratory projects for Altera's UP 2 and the new UP 3 FPGA board. Rapid Prototyping of Digital Systems: Quartus II Edition includes four tutorials on the Altera Quartus II and NIOS II tool environment, an overview of programmable logic, and IP cores with several easy-to-use input and output functions. These features were developed to help students get started quickly. Early design examples use schematic capture and IP cores developed for the Altera UP FPGA boards. VHDL is used for more complex designs after a short introduction to VHDL-based synthesis. New to this edition is an overview of System-on-a-Programmable Chip (SOPC) technology and SOPC design examples for the UP3 using Altera's new NIOS II Processor hardware and C software development tools. | ||
590 | _aPara consulta fuera de la UANL se requiere clave de acceso remoto. | ||
700 | 1 |
_aHall, Tyson S. _eautor _9302062 |
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700 | 1 |
_aFurman, Michael D. _eautor _9302063 |
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710 | 2 |
_aSpringerLink (Servicio en línea) _9299170 |
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776 | 0 | 8 |
_iEdición impresa: _z9780387277288 |
856 | 4 | 0 |
_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/0-387-28965-8 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL) |
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