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008			150903s2007 xxu| o |||| 0|eng d
020			_a9780387688534 _99780387688534
024	7		_a10.1007/9780387688534 _2doi
035			_avtls000331937
039		9	_a201509030208 _bVLOAD _c201404121955 _dVLOAD _c201404091722 _dVLOAD _y201402041016 _zstaff
040			_aMX-SnUAN _bspa _cMX-SnUAN _erda
050		4	_aTK7888.4
100	1		_aItoh, Kiyoo. _eeditor. _9304419
245	1	0	_aUltra-Low Voltage Nano-Scale Memories / _cedited by Kiyoo Itoh, Masashi Horiguchi, Hitoshi Tanaka.
264		1	_aBoston, MA : _bSpringer US, _c2007.
300			_brecurso en línea.
336			_atexto _btxt _2rdacontent
337			_acomputadora _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_aarchivo de texto _bPDF _2rda
490	0		_aSeries On Integrated Circuits And Systems, _x1558-9412
500			_aSpringer eBooks
505	0		_aAn Introduction to LSI Design -- Ultra-Low Voltage Nano-Scale DRAM Cells -- Ultra-Low Voltage Nano-Scale SRAM Cells -- Leakage Reduction for Logic Circuits in RAMs -- Variability Issue in the Nanometer Era -- Reference Voltage Generators -- Voltage Down-Converters -- Voltage Up-Converters and Negative Voltage Generators -- High-Voltage Tolerant Circuits.
520			_aUltra-Low Voltage Nano-Scale Memories provides an in-depth discussion of the state-of-the-art nanometer and sub-1-V memory LSIs that are playing decisive roles in power conscious systems. Emerging problems between the device, circuit, and system levels are systematically covered in terms of reliable high-speed operations of memory cells and peripheral logic circuits. The effectiveness of solutions at device and circuit levels is also described at length through clarifying noise components in an array, and even essential differences in ultra-low voltage operations between DRAMs and SRAMs. Moreover, various kinds of on-chip voltage converters necessary to solve problems with internal power-supply managements are extensively discussed. This authoritative monograph addresses these design challenges for memory and circuit engineers as well as for researchers and students who are interested in ultra-low voltage nano-scale memory LSIs.
590			_aPara consulta fuera de la UANL se requiere clave de acceso remoto.
700	1		_aHoriguchi, Masashi. _eeditor. _9304420
710	2		_aSpringerLink (Servicio en línea) _9299170
776	0	8	_iEdición impresa: _z9780387333984
700	1		_9348949 _aTanaka, Hiroshi. _eeditor.
856	4	0	_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/978-0-387-68853-4 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL)
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999			_c279862 _d279862