000 | 03219nam a22003855i 4500 | ||
---|---|---|---|
001 | 279974 | ||
003 | MX-SnUAN | ||
005 | 20160429154005.0 | ||
007 | cr nn 008mamaa | ||
008 | 150903s2009 xxu| o |||| 0|eng d | ||
020 |
_a9780387710563 _99780387710563 |
||
024 | 7 |
_a10.1007/9780387710563 _2doi |
|
035 | _avtls000332102 | ||
039 | 9 |
_a201509030216 _bVLOAD _c201404122025 _dVLOAD _c201404091754 _dVLOAD _y201402041020 _zstaff |
|
040 |
_aMX-SnUAN _bspa _cMX-SnUAN _erda |
||
050 | 4 | _aTK7888.4 | |
100 | 1 |
_aKourtev, Ivan S. _eeditor. _9304592 |
|
245 | 1 | 0 |
_aTiming Optimization Through Clock Skew Scheduling / _cedited by Ivan S. Kourtev, Baris Taskin, Eby G. Friedman. |
264 | 1 |
_aBoston, MA : _bSpringer US, _c2009. |
|
300 | _brecurso en línea. | ||
336 |
_atexto _btxt _2rdacontent |
||
337 |
_acomputadora _bc _2rdamedia |
||
338 |
_arecurso en línea _bcr _2rdacarrier |
||
347 |
_aarchivo de texto _bPDF _2rda |
||
500 | _aSpringer eBooks | ||
505 | 0 | _aVLSI Systems -- Signal Delay in VLSI Systems -- Timing Properties of Synchronous Systems -- Clock Skew Scheduling and Clock Tree Synthesis -- Clock Skew Scheduling of Level-Sensitive Circuits -- Clock Skew Scheduling for Improved Reliability -- Delay Insertion and Clock Skew Scheduling -- Practical Considerations -- Clock Skew Scheduling in Rotary Clocking Technology -- Experimental Results. | |
520 | _aTiming Optimization Through Clock Skew Scheduling focuses on optimizing the timing of large scale, high performance, digital synchronous systems. A particular emphasis is placed on algorithms for non-zero clock skew scheduling to improve the performance and reliability of VLSI circuits. This research monograph answers the need for a broad introduction to state-of-the-art clock skew scheduling algorithms from a circuit, graph, and mathematical optimization background. A detailed description of clock skew scheduling application on edge-triggered and level-sensitive circuits, synchronized with single and multi-phase clocking schemes, and formulated as linear programming (LP) and quadratic programming (QP) formulations are provided along with an analysis of optimal computer solution techniques. Theoretical limits of improvement in clock frequency through clock skew scheduling are highlighted. Hints and a preliminary implementation of a parallel skew scheduling application are also included. Timing Optimization Through Clock Skew Scheduling contains sufficient detail for the advanced CAD algorithm developer, researcher and graduate student. Furthermore, with the material provided on timing properties and optimization, those readers with less background can also benefit from this book. | ||
590 | _aPara consulta fuera de la UANL se requiere clave de acceso remoto. | ||
700 | 1 |
_aTaskin, Baris. _eeditor. _9304593 |
|
700 | 1 |
_aFriedman, Eby G. _eeditor. _9304594 |
|
710 | 2 |
_aSpringerLink (Servicio en línea) _9299170 |
|
776 | 0 | 8 |
_iEdición impresa: _z9780387710556 |
856 | 4 | 0 |
_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/978-0-387-71056-3 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL) |
942 | _c14 | ||
999 |
_c279974 _d279974 |