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008 | 150903s2011 xxu| o |||| 0|eng d | ||
020 |
_a9781441964601 _99781441964601 |
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024 | 7 |
_a10.1007/9781441964601 _2doi |
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035 | _avtls000338671 | ||
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_a201509030326 _bVLOAD _c201404300348 _dVLOAD _y201402060916 _zstaff |
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_aMX-SnUAN _bspa _cMX-SnUAN _erda |
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050 | 4 | _aTK7888.4 | |
100 | 1 |
_aHübner, Michael. _eeditor. _9313589 |
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245 | 1 | 0 |
_aMultiprocessor System-on-Chip : _bHardware Design and Tool Integration / _cedited by Michael Hübner, Jürgen Becker. |
264 | 1 |
_aNew York, NY : _bSpringer New York, _c2011. |
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300 |
_ax, 300 páginas 100 ilustraciones _brecurso en línea. |
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336 |
_atexto _btxt _2rdacontent |
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337 |
_acomputadora _bc _2rdamedia |
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338 |
_arecurso en línea _bcr _2rdacarrier |
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347 |
_aarchivo de texto _bPDF _2rda |
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500 | _aSpringer eBooks | ||
520 | _aImproving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. •Provides a state-of-the-art overview of system design using MPSoC architectures; •Describes current trends in on-chip communication architectures; •Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; •Includes coverage of challenges in physical design for multi- and manycore hardware architectures. | ||
590 | _aPara consulta fuera de la UANL se requiere clave de acceso remoto. | ||
700 | 1 |
_aBecker, Jürgen. _eeditor. _9313590 |
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710 | 2 |
_aSpringerLink (Servicio en línea) _9299170 |
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776 | 0 | 8 |
_iEdición impresa: _z9781441964595 |
856 | 4 | 0 |
_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/978-1-4419-6460-1 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL) |
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