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008 | 150903s2010 xxu| o |||| 0|eng d | ||
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_a9781441909442 _99781441909442 |
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024 | 7 |
_a10.1007/9781441909442 _2doi |
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_a201509030811 _bVLOAD _c201404300341 _dVLOAD _y201402060903 _zstaff |
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_aMX-SnUAN _bspa _cMX-SnUAN _erda |
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050 | 4 | _aTK7888.4 | |
100 | 1 |
_aGulati, Kanupriya. _eautor _9313336 |
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245 | 1 | 0 |
_aHardware Acceleration of EDA Algorithms : _bCustom ICs, FPGAs and GPUs / _cby Kanupriya Gulati, Sunil P. Khatri. |
264 | 1 |
_aBoston, MA : _bSpringer US, _c2010. |
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300 |
_ax, 194 páginas 65 ilustraciones _brecurso en línea. |
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_atexto _btxt _2rdacontent |
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_acomputadora _bc _2rdamedia |
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_arecurso en línea _bcr _2rdacarrier |
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_aarchivo de texto _bPDF _2rda |
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500 | _aSpringer eBooks | ||
505 | 0 | _aAlternative Hardware Platforms -- Hardware Platforms -- GPU Architecture and the CUDA Programming Model -- Control Dominated Category -- Accelerating Boolean Satisfiability on a Custom IC -- Accelerating Boolean Satisfiability on an FPGA -- Accelerating Boolean Satisfiability on a Graphics Processing Unit -- Control Plus Data Parallel Applications -- Accelerating statistical static Timing Analysis Using Graphics Processors -- Accelerating Fault Simulation Using Graphics Processors -- Fault Table Generation Using Graphics Processors -- Accelerating Circuit Simulation Using Graphics Processors -- Automated Generation of GPU Code -- Automated Approach for Graphics Processor Based Software Acceleration -- Conclusions. | |
520 | _aHardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs Kanupriya Gulati Sunil P. Khatri This book deals with the acceleration of EDA algorithms using hardware platforms such as Custom ICs, FPGAs and GPUs. Widely applied CAD algorithms are studied for potential acceleration on these platforms. Coverage includes discussion of conditions under which it is preferable to use one platform over another, e.g., when an EDA problem has a high degree of data parallelism, the GPU is typically the preferred platform, whereas when the problem has more control, an FPGA may be preferred. Results are presented for the acceleration of several CAD algorithms (fault simulation, fault table generation, model card evaluation in SPICE, Monte Carlo based statistical static timing analysis, Boolean Satisfiability), demonstrating speedups up to 800X compared to single-core implementatinos of these algorithms. This book serves as a valuable guide on how best to leverage parallelism to accelerate CAD algorithms. It also presents a methodology to automatically extract SIMD parallelism from regular uniprocessor code which satisfies a set of constraints. With this approach, such uniprocessor code can automatically be converted to GPU code, allowing for significant acceleration. This approach is particularly useful since different GPUs have vastly different specifications, making the manual generation of GPU code an unscalable proposition. In particular, this book: Provides guidelines on whether to use Custom ICs, GPUs or FPGAs when accelerating a given EDA algorithm, validating these suggestions with a concrete example (Boolean Satisfiability) implemented on all these platforms; Demonstrates the acceleration of several popular EDA algorithms on GPUs, with speedups up to 800X; Helps the reader by presenting example algorithms which may be used by the reader to determine how best to accelerate their specific EDA algorithm; Discusses an automatic approach to generate GPU code, given regular uniprocessor code which satisfies a set of constraints; Serves as a valuable reference for anyone interested in exploring alternative hardware platforms for accelerating various EDA applications by harnessing the parallelism available in these platforms. | ||
590 | _aPara consulta fuera de la UANL se requiere clave de acceso remoto. | ||
700 | 1 |
_aKhatri, Sunil P. _eautor _9313903 |
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710 | 2 |
_aSpringerLink (Servicio en línea) _9299170 |
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776 | 0 | 8 |
_iEdición impresa: _z9781441909435 |
856 | 4 | 0 |
_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/978-1-4419-0944-2 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL) |
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