000			03371nam a22003735i 4500
001			287107
003			MX-SnUAN
005			20160429154530.0
007			cr nn 008mamaa
008			150903s2012 xxu| o |||| 0|eng d
020			_a9781441999764 _99781441999764
024	7		_a10.1007/9781441999764 _2doi
035			_avtls000339486
039		9	_a201509030838 _bVLOAD _c201404300400 _dVLOAD _y201402060936 _zstaff
040			_aMX-SnUAN _bspa _cMX-SnUAN _erda
050		4	_aTK7888.4
100	1		_aEggersglüß, Stephan. _eautor _9316135
245	1	0	_aHigh Quality Test Pattern Generation and Boolean Satisfiability / _cby Stephan Eggersglüß, Rolf Drechsler.
264		1	_aBoston, MA : _bSpringer US, _c2012.
300			_axviii, 193 páginas 55 ilustraciones _brecurso en línea.
336			_atexto _btxt _2rdacontent
337			_acomputadora _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_aarchivo de texto _bPDF _2rda
500			_aSpringer eBooks
505	0		_aPart I: Preliminaries and Previous Work -- Circuits and Testing -- Boolean Satisfiability -- ATPG Based on Boolean Satisfiability -- Part II: New SAT Techniques and their Application in ATPG -- Dynamic Clause Activation -- Circuit-based Dynamic Learning -- Part III: High Quality Delay Test Generation -- High Quality ATPG for Transition Faults -- Path Delay Fault Model -- Summary and Outlook.
520			_aThis book provides an overview of automatic test pattern generation (ATPG) and introduces novel techniques to complement classical ATPG, based on Boolean Satisfiability (SAT).  A fast and highly fault efficient SAT-based ATPG framework is presented which is also able to generate high-quality delay tests such as robust path delay tests, as well as tests with long propagation paths to detect small delay defects. The aim of the techniques and methodologies presented in this book is to improve SAT-based ATPG, in order to make it applicable in industrial practice. Readers will learn to improve the performance and robustness of the overall test generation process, so that the ATPG algorithm reliably will generate test patterns for most targeted faults in acceptable run time to meet the high fault coverage demands of industry. The techniques and improvements presented in this book provide the following advantages: Provides a comprehensive introduction to test generation and Boolean Satisfiability (SAT); Describes a highly fault efficient SAT-based ATPG framework; Introduces circuit-oriented SAT solving techniques, which make use of structural information and are able to accelerate the search process significantly; Provides SAT formulations for the prevalent delay faults models, in addition to the classical stuck-at fault model; Includes an industrial perspective on the state-of-the-art in the testing, along with SAT; two topics typically distinguished from each other.
590			_aPara consulta fuera de la UANL se requiere clave de acceso remoto.
700	1		_aDrechsler, Rolf. _eautor _9302301
710	2		_aSpringerLink (Servicio en línea) _9299170
776	0	8	_iEdición impresa: _z9781441999757
856	4	0	_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/978-1-4419-9976-4 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL)
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999			_c287107 _d287107