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008 150903s2014 gw | o |||| 0|eng d
020 _a9783319036595
_99783319036595
024 7 _a10.1007/9783319036595
_2doi
035 _avtls000346406
039 9 _a201509030916
_bVLOAD
_c201405050335
_dVLOAD
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040 _aMX-SnUAN
_bspa
_cMX-SnUAN
_erda
050 4 _aTK7888.4
100 1 _aBrandonisio, Francesco.
_eautor
_9327005
245 1 0 _aNoise-Shaping All-Digital Phase-Locked Loops :
_bModeling, Simulation, Analysis and Design /
_cby Francesco Brandonisio, Michael Peter Kennedy.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2014.
300 _axiii, 177 páginas 145 ilustraciones, 79 ilustraciones en color.
_brecurso en línea.
336 _atexto
_btxt
_2rdacontent
337 _acomputadora
_bc
_2rdamedia
338 _arecurso en línea
_bcr
_2rdacarrier
347 _aarchivo de texto
_bPDF
_2rda
490 0 _aAnalog Circuits and Signal Processing,
_x1872-082X
500 _aSpringer eBooks
505 0 _aIntroduction -- Phase Digitization in All-Digital PLLs -- A Unifying Framework for TDC Architectures -- Analytical Predictions of Phase Noise in ADPLLs -- Advantages of Noise Shaping and Dither -- Efficient Modeling and Simulation of Accumulator-Based ADPLLs -- Modelling and Estimating Phase Noise with Matlab.
520 _aThis book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.   • Discusses in detail a wide range of all-digital phase-locked loops architectures; • Presents a unified framework in which to model time-to-digital converters for ADPLLs; • Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs; • Describes an efficient approach to model ADPLLS; • Includes Matlab code to reproduce the examples in the book.
590 _aPara consulta fuera de la UANL se requiere clave de acceso remoto.
700 1 _aKennedy, Michael Peter.
_eautor
_9314950
710 2 _aSpringerLink (Servicio en línea)
_9299170
776 0 8 _iEdición impresa:
_z9783319036588
856 4 0 _uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/978-3-319-03659-5
_zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL)
942 _c14
999 _c293919
_d293919