000			02220nam a22003855i 4500
001			302661
003			MX-SnUAN
005			20170705134257.0
007			cr nn 008mamaa
008			150903s2011 gw | o |||| 0|eng d
020			_a9783642195686 _99783642195686
024	7		_a10.1007/9783642195686 _2doi
035			_avtls000356644
039		9	_a201509030551 _bVLOAD _c201405060408 _dVLOAD _y201402191223 _zstaff
040			_aMX-SnUAN _bspa _cMX-SnUAN _erda
050		4	_aTK7800-8360
100	1		_aIshibashi, Koichiro. _eeditor. _9341020
245	1	0	_aLow Power and Reliable SRAM Memory Cell and Array Design / _cedited by Koichiro Ishibashi, Kenichi Osada.
264		1	_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg, _c2011.
300			_axii, 144 páginas _brecurso en línea.
336			_atexto _btxt _2rdacontent
337			_acomputadora _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_aarchivo de texto _bPDF _2rda
490	0		_aSpringer Series in Advanced Microelectronics, _x1437-0387 ; _v31
500			_aSpringer eBooks
505	0		_aPreface -- Introduction -- Fundamentals of SRAM Memory Cell -- Electrical Stability -- Sensitivity Analysis -- Memory Cell Design Technique for Low Power SOC -- Array Design Techniques -- Dummy Cell Design -- Reliable Memory Cell Design -- Future Technologies.
520			_aSuccess in the development of recent advanced semiconductor device technologies is due to the success of SRAM memory cells. This book addresses various issues for designing SRAM memory cells for advanced CMOS technology. To study LSI design, SRAM cell design is the best materials subject because issues about variability, leakage and reliability have to be taken into account for the design.
590			_aPara consulta fuera de la UANL se requiere clave de acceso remoto.
700	1		_aOsada, Kenichi. _eeditor. _9341021
710	2		_aSpringerLink (Servicio en línea) _9299170
776	0	8	_iEdición impresa: _z9783642195679
856	4	0	_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/978-3-642-19568-6 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL)
942			_c14
999			_c302661 _d302661