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| 001 | 317443 | ||
| 003 | MX-SnUAN | ||
| 005 | 20160429161027.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 160108s2015 gw | s |||| 0|eng d | ||
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_a9783319019970 _9978-3-319-01997-0 |
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| 035 | _avtls000416077 | ||
| 039 | 9 |
_y201601081115 _zstaff |
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| 050 | 4 | _aTK7888.4 | |
| 100 | 1 |
_aAlioto, Massimo, _eautor. _9307344 |
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| 245 | 1 | 0 |
_aFlip-flop design in nanometer cmos : _bfrom high speed to low energy / _cMassimo Alioto, Elio Consoli, Gaetano Palumbo. |
| 264 | 1 |
_aCham : _bSpringer International Publishing : _bSpringer, _c2015. |
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| 300 |
_axv, 260 páginas : _b123 ilustraciones, 5 ilustraciones en color. |
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| 336 |
_atexto _btxt _2rdacontent |
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_acomputadora _bc _2rdamedia |
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| 338 |
_arecurso en línea _bcr _2rdacarrier |
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| 347 |
_aarchivo de texto _bPDF _2rda |
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| 500 | _aSpringer eBooks | ||
| 505 | 0 | _aThe Logical Effort Method -- Design in the Energy-Delay Space -- Clocked Storage Elements -- Flip-Flop Optimized Design -- Analysis and Comparison in the Energy-Delay-Area Domain -- Energy Efficiency Versus Clock Slope -- Hold Time Issues and Impact of variations on Flip-Flop Topologies -- Ultra-Fast and Energy-Efficient Pulsed Latch Topologies. | |
| 590 | _aPara consulta fuera de la UANL se requiere clave de acceso remoto. | ||
| 700 | 1 |
_aConsoli, Elio, _eautor. _9360995 |
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| 700 | 1 |
_aPalumbo, Gaetano, _eautor. _9307345 |
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| 710 | 2 |
_aSpringerLink (Servicio en línea) _9299170 |
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| 776 | 0 | 8 |
_iEdición impresa: _z9783319019963 |
| 856 | 4 | 0 |
_uhttp://remoto.dgb.uanl.mx/login?url=http://dx.doi.org/10.1007/978-3-319-01997-0 _zConectar a Springer E-Books (Para consulta externa se requiere previa autentificación en Biblioteca Digital UANL) |
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_c317443 _d317443 |
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